UHDI Reality

Ultra UDI PCB Design Guidelines: Lessons from the Fabrication Floor

Ultra HDI success depends on designing within production limits, not pushing minimum capabilities.
by Anaya Vardya

There’s a point many design teams reach where routing density that once seemed impossible becomes routine. Then the design hits the fabrication floor, and questions begin.

Stackup choices. Mask clearances. Registration tolerances. Individually, these may seem like small details. But in ultra HDI (UHDI), small decisions compound quickly – impacting yield, cost and timelines.

From the fabrication perspective, this pattern is common in first-time UHDI builds. Designers want fixed rules and clear limits. But in UHDI, the most accurate answer is often: “it depends.”

That’s not uncertainty. That’s experience.

In UHDI PCB design, it is important to avoid designing at minimum capability and instead work within established production comfort zones to ensure consistent yield and reliability. Maintaining a 1:1 microvia aspect ratio, such as matching a 50µm via with a 50µm dielectric, supports manufacturability and long-term performance.

Stacked vias should be used selectively rather than by default, as overuse can introduce complexity and reliability risks. Solder mask must be treated as a precision design parameter rather than a cosmetic layer, as it directly impacts spacing and assembly outcomes. Material selection should align with RF and thermal requirements, not just geometric constraints, to ensure overall performance.

Finally, engaging the fabricator early – before finalizing the stackup – helps optimize design decisions, reduce risk and improve production results

Table 1. Design Capability Vs. Production Reality

Understanding this gap is critical to successful UHDI production.

Minimum capability is not a design target. One of the most common issues in first-time Ultra HDI builds is designing at absolute minimum capability, such as pushing line and space to published limits, using 50µm vias throughout the entire design, minimizing solder mask dams, and relying heavily on stacked via structures. While these approaches may be technically manufacturable, they are not always suitable for production, where process variation and reliability must be considered.

Capability charts reflect what is possible under controlled conditions. Production introduces:

  • Material variation
  • Panel movement
  • Plating distribution effects
  • Statistical process spread.

UDI compresses process windows. Designing at the edge significantly reduces yield.

In many cases, small adjustments – such as increasing line width by a few microns or slightly widening mask dams – can shift a build from marginal to stable.

Better question to ask: “What is your comfortable production range?” Rather than: “What is your minimum capability?”

Stackup design guidelines for UHDI. Stackup decisions are one of the most critical variables in UHDI success.

The minimum dielectric thickness in UHDI depends on several interrelated factors, including via diameter, aspect ratio, impedance requirements and the material’s coefficient of thermal expansion (CTE). UHDI circuitry can be placed on external layers, provided multiple via structures are not terminated there; if several via structures are required, it is often better to move the UHDI circuitry to internal layers to maintain reliability.

The use of 50µm microvias is feasible when a 1:1 aspect ratio is maintained, meaning a 50µm via should be paired with approximately a 50µm dielectric layer. This relationship directly influences impedance control, copper thickness, lamination cycles and long-term reliability.

In practice, two nearly identical designs can produce very different outcomes depending on how early fabrication input is incorporated. A design with a stackup finalized before fabrication involvement may face aggressive lamination requirements, registration challenges and lower yield. In contrast, a design developed with early collaboration may include slight dielectric adjustments, optimized copper weight and fewer lamination cycles, resulting in improved yield and shorter lead times. Early fabrication input often reduces complexity, cost and overall risk.

Microvia design: stacked vs. staggered vias. UHDI enables more advanced via structures, but also increases risk if misapplied.

Stacked microvias can be reliable when they are properly designed and processed, but their performance depends on several factors, including the material system, copper fill quality, thermal cycling requirements and the end-use environment. A common mistake is designing deep stacked structures simply because the materials make it possible.

A more effective approach is ask “Should we stack this?” Rather than: “Can we stack this?”. Best practices include:

  • Use stacked vias selectively where density requires it
  • Prefer staggered vias for improved mechanical reliability
  • Limit stack depth unless necessary
  • Ensure copper filling for stacked structures.
Table 2. Tradeoffs Between Stacked and Staggered Microvias

Staggered vias are often the more forgiving and production-stable solution.

Figure 1. Comparison of stacked and staggered microvia structures, highlighting density, process complexity and reliability implications.

In comparing fence vias to an ASC via wall approach, staggered via designs eliminate the need for copper via filling while providing improved shielding performance. This configuration can enhance overall yield and reliability, while also contributing to reduced lead times.

Solder mask design rules for UHDI. At UHDI feature sizes, solder mask is no longer just a protective coating – it becomes a precision design variable.

In UHDI, key geometries become significantly tighter, with pad openings approaching approximately 60µm and solder mask dams shrinking toward about 50µm, while alignment tolerances do not scale proportionally. A common issue in these conditions is the mixing of SMD (solder mask defined) and NSMD (non-solder mask defined) pads within fine-pitch BGAs, which can introduce variability between pad types and lead to assembly challenges.

Recommended practices:

  • Use mask-defined pads (SMD) for spacing below ~75µm
  • Maintain ≥75µm mask dams where possible
  • Design with realistic alignment tolerances
  • Avoid inconsistent pad strategies within the same component
  • Solder mask strategy directly impacts yield and assembly success in UHDI.
Figure 2. Fine-pitch solder mask illustration showing pad openings, dam width and the effect of realistic registration tolerance on exposure and isolation.

RF Performance in UHDI: What Actually Matters

Ultra HDI enables tighter line width control, improved copper geometry that supports signal integrity, and more consistent impedance.

Geometry alone does not guarantee RF performance, even though UHDI boards generally perform better from an RF perspective than subtractive etched circuits. UHDI does not automatically reduce insertion loss, as RF performance depends on factors such as copper roughness, foil type, dielectric consistency and plating uniformity.

A common misconception is that moving to UHDI will resolve signal integrity issues, but while UHDI can improve performance, material selection and process discipline ultimately determine the outcome. Electrical performance is therefore driven by both material systems and geometry.

Why “It Depends” Is the Right Answer

In UHDI, design variables are tightly interconnected:

  • Aspect ratio ↔ dielectric thickness
  • Via structure ↔ reliability
  • Mask definition ↔ copper spacing
  • Material selection ↔ RF performance
  • CTE ↔ thermal cycling durability

Ultra HDI fabrication is closer to semiconductor packaging than traditional PCB manufacturing. Process margins are smaller. Interactions are more complex. When a fabricator says “it depends,” it reflects a deep understanding of these relationships.

What Works the First Time in UHDI Builds

The most successful UHDI designs consistently share these characteristics:

  • Early collaboration with fabrication
  • Intentional via strategy (not overuse of stacking)
  • Adherence to 1:1 aspect ratio guidelines
  • Defined solder mask strategy
  • Designs within production-ready ranges, not minimum limits.

The best teams don’t treat the fabricator as a downstream supplier. They treat them as part of the design process.

In UHDI PCB design, several common questions highlight key best practices. One of the biggest mistakes is designing at minimum capability rather than within stable production ranges, which can negatively impact yield and reliability.

Microvias should typically follow a 1:1 aspect ratio as a reliable starting point for manufacturability. While stacked microvias can be used, they are not always the best option, as staggered vias often provide better reliability at a lower cost. UHDI does not automatically improve RF performance, since outcomes depend heavily on material selection and copper profile.

Finally, fabrication should be involved as early as possible in the design process, ideally before stackup decisions are finalized, to ensure optimal results.

Final Thought

UHDI doesn’t just change what is possible. It changes how design decisions impact manufacturing. The difference between a design that “can be built” and one that builds reliably, repeatedly, and cost-effectively often comes down to small decisions made early. And in UHDI – the small things are no longer small.
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Anaya Vardya is CEO of American Standard Circuits and ASC Sunstone Circuits. ASC works closely with customers and design teams on advanced PCB technologies, including RF, HDI, rigid-flex and Ultra HDI, with a focus on turning complex fabrication realities into practical design guidance.