In Case You Missed It
Characteristic Impedance
“Identifying and Modeling Resonance-Related Fluctuations on the Experimental Characteristic Impedance for PCB and On-Chip Transmission Lines”
Authors: Yojanes Rodríguez-Velásquez, Reydezel Torres-Torres and Roberto Murphy-Arteaga
Abstract: It is well known that the fluctuations in experimentally obtained characteristic impedance versus frequency curves are associated with resonances originated by standing waves bouncing back and forth between the transitions at the transmission line terminations. In fact, microwave engineers are aware of the difficulty to completely remove the parasitic effect of these transitions, which makes obtaining smooth and physically expected frequency-dependent curves for the characteristic impedance a tough task. Here, the authors point out for the first time that these curves exhibit additional fluctuations within the microwave range due to standing waves taking place within the transition itself. Experimental verification of this fact was carried out by extracting this fundamental parameter from measurements performed on on-chip and printed circuit board (PCB) lines using probe pad adapters and coaxial connectors. The authors demonstrate that the lumped circuit approach to represent the transitions lacks validity when the additional fluctuations due to the connectors become apparent, and we propose a new model including transmission line effects within the transition. (Electronics, July 2023, https://doi.org/10.3390/electronics12132994)
Component Reliability
“The Failure Mechanism of Common-Mode Chip Inductors”
Authors: Jin Chen, et. al.
Abstract: The failure behavior of common-mode chip inductors (CMCIs) on printed circuit boards was investigated to reveal the failure mechanism of low-temperature cofired ceramic (LTCC) devices. A specific model of CMCIs (0806-type) with an insulation resistance greater than 109Ω was used in this research. In the highly accelerated life test (HALT), the insulation resistance of the CMCI was rapidly reduced to less than 103Ω, which was determined to be invalid. A variety of analytical techniques were used to determine the failure mechanism of the CMCIs, including computed tomography (CT), optical microscopy, scanning electron microscopy (SEM) with energy-dispersive x-ray spectroscopy (EDS), and x-ray photoelectron spectroscopy (XPS). The results show that silver migration and Na enrichment are the direct reasons for the failure of the CMCIs. The Na+-β/β″-Al2O3 formed in the sintering provides pathways for the migration of Ag+ and Na+ in the LTCC under an electric field. With the further reaction, Na is enriched in the LTCC near the low potential while Ag+ is reduced to Ag and deposited in the LTCC near the high potential, which causes the gradual failure of the insulation resistance of the CMCIs until a short circuit occurs. (Journal of Electronic Materials, May 2023, https://doi.org/10.1007/s11664-022-10105-y)
Tin Plating
“The Influence of Element Lead (Pb) Content in Tin Plating on Tin Whisker Initiation/Growth”
Authors: David Hillman, et. al.
Abstract: The implementation of the Restriction of Hazardous Substances (RoHS) European Union (EU) Directive in 2005 resulted in the introduction of pure tin as an acceptable surface finish for printed circuit boards and component terminations. A drawback of pure tin surface finishes is the potential to form tin whiskers. Tin whiskers are a metallurgical phenomenon associated with tin rich/pure tin materials and have been a topic of intense industry interest. The acceptance and use of pure tin by the electronics industry component fabricators is understandable as the pure tin surface finishes are inexpensive, are simple plating systems to operate and have reasonable solderability characteristics. However, high performance/harsh environment electronics typically have product lifecycles that are measured in decades and therefore are much more susceptible to the potential long-term threat of tin whiskers. GEIA-STD-0005-2 “Standard for Mitigating the Effects of Tin Whiskers in Aerospace and High Performance Electronic Systems” established the definition of the term “Pb-free tin” as “pure tin or any tin alloy with <3% lead (Pb) content by weight.” A functional definition of “pure tin” was necessary so the electronics industry could establish tin whisker risk protocols against a known acceptable target value in terms of soldering materials and processes. An investigation was conducted to determine the influence of 1-5% elemental lead (Pb) content in tin plating on tin whisker initiation and growth. The investigation results were used in the revision of GEIA-STD-0005-2 technical discussions. (Journal of Surface Mount Technology, March 2023, https://doi.org/10.37665/smt.v36i1.28) 
