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buetow
in-chief
ome 13 years ago, UP Media Group launched the first virtual trade show for the electronics industry. In some ways – most, probably – we were ahead of the times. People liked it because it was simple to attend, but the platform wasn’t ready for prime time.
That’s not to say it was technically subpar. You could pop in and out of booths and talk to the personnel waiting for you, and I still feel for those folks who, driven by caffeine and excitement (or just an affinity for self-abuse), kept vigil around the clock as attendees in different time zones came on line and into the show. And we held webinars and chats with high-profile experts like Dr. Eric Bogatin. But in the end, attendees seemed to prefer meeting with peers face to face.

Bowman promoted Jeffrey Korpus to manager of the company’s Standards business Unit. He formerly was project manager and support engineer with responsibility for new standards design and team management, and managed Bowman’s quality system.
Charles Pfeil has released the second version of his e-book on High-Speed Constraint Values and PCB Layout Methods, available at pcdandf.com.
MacDermid Alpha appointed Fabio Taiana vice president Assembly Solutions – Europe.
Sierra Circuits named Roy Alcus director of manufacturing.
This year’s conference features a pair of extended talks from Lee Ritchey on power delivery system design and stackup design, two talks from Dr. Eric Bogatin, and three full days of classes from Rick Hartley. The conference covers everything from RF/microwave and mixed-signal design, circuit grounding, understanding material choices, flex circuits, signal and power integrity, to fabrication and assembly processes. Talks are aimed at the spectrum of backgrounds, from novice to advanced.
Obtaining data from the supply chain to support chemical content reporting for article (hardware) products remains challenging and resource-intensive for industries such as aerospace and defense, the trade groups said. Increasing use of materials and substances declaration standards promotes efficiency in obtaining such data, however.
The standard, which is voluntary, supports data acquisition for various substance reporting requirements for article products, including data required by the EU’s Waste Framework Directive for reporting to the SCIP database. Under the WFD, European article suppliers subject to SVHC reporting under REACH Article 33 will also be required to report SVHC data to the SCIP database. However, SCIP reporting will also require additional data elements such as material and product identifiers.
IPC-1754 supports all data elements needed for reporting to SCIP. In support of SCIP reporting, IPC is developing guidance for using IPC declaration standards when acquiring the necessary data. IAEG is also developing supporting general information for the use of IPC-1754 and related IAEG-developed tools in the AD industry supply chain, available on the IAEG website. (CD)
Escatec named Patrick Macdonald chief executive.
Intelligent Manufacturing Solutions (IMS) named Jim Barry director of business development. His experience includes 14 years as president of Eltek USA and seven years in executive positions at Strataflex.

Kimball Electronics promoted Steve Korn to president of Global Electronics Manufacturing Services Operations, and Lee Kemper to vice president of Diversified Contract Manufacturing Services.

Libra Industries appointed Trever Winters VP of operations at its Dayton, OH, facility. He has experience as master scheduler, supply chain analyst, and most recently site manager.
Moog named John Hengst SMT manufacturing engineer.
Mostafa Aghazadeh of Intel has been elected chairman of the iNEMI board of directors.
The plant, which houses a Benchmark Lark Technology team, as well as other Benchmark operations, celebrated its grand opening in June.
It is the fourth greenfield fabrication plant built in the US in the past 20 years, the others being Whelen Engineering’s captive shop, which opened in 2015; GreenSource Fabrication, which launched in 2018; and TTM’s new plant in Chippewa Falls, built in a converted 20-year-old, 40,000-sq. ft. warehouse and officially opened last winter.
Benchmark is the fifth-largest EMS company in the US and 18th in the world, according to the Circuits Assembly Top 50.
Press-fit technology is relatively new to the automotive industry and high-reliability needs but not to electronics, IPC said. Used primarily in the telecommunications industry, the dependability and efficiency of press-fit makes it stable for use in high-reliability electronics.
The technology has been found to be critical to the manufacturing of electronic and electro-mechanical components. (CD)
A bipartisan pair of US senators have introduced a bill to restore semiconductor manufacturing to American soil by increasing federal incentives to stimulate advanced chip manufacturing, enable cutting-edge research and development, secure the supply chain and bring greater transparency to the microelectronics ecosystem.
ASE Technology, Powertech, SPIL and Amkor plan to take advantage of incentive schemes recently announced by the Indian government to set up semiconductor packaging and test services in the country.
Acer is seeing shortages of components, including passive components, ICs and panels by around 30% due to surging orders from the end-market, according to co-COO Tiffany Huang.
Adco Circuits has developed a free instant costing tool for circuit board assemblies that takes a bill of material and outputs a price with complete unit costs.
AIM Solder opened a stocking facility in Manaus, Brazil.



Introduction

What is IPC?

Class 1, Class 2, and Class 3 PCBs

IPC Guidelines for Manufacturing Defects

IPC Standards for Annular Ring

Design Rules for Annular Rings

IPC Standards for Assembly Process

IPC Standards for Solder Joints

Common Differences Between IPC Classes

PCB Cross-Section Verification

IPC Documents to Set the Level of Acceptance Criteria

Introduction

What is IPC?

Class 1, Class 2, and Class 3 PCBs

IPC Guidelines for Manufacturing Defects

IPC Standards for Annular Ring

Design Rules for Annular Rings

IPC Standards for Assembly Process

IPC Standards for Solder Joints

Common Differences Between IPC Classes

PCB Cross-Section Verification

IPC Documents to Set the Level of Acceptance Criteria

Introduction

What is IPC?

Class 1, Class 2, and Class 3 PCBs

IPC Guidelines for Manufacturing Defects

IPC Standards for Annular Ring

Design Rules for Annular Rings

IPC Standards for Assembly Process

IPC Standards for Solder Joints

Common Differences Between IPC Classes

PCB Cross-Section Verification

IPC Documents to Set the Level of Acceptance Criteria
Trends in the U.S. electronics equipment market (shipments only).
The entirety of my working career, the mantra of any good business consultant or culture guru has been be flexible and embrace change. Whether an organization is implementing a TQM (total quality management) plan or struggling with financial survival because “plan A” no longer works, embracing flexibility and rapid change is never easy – and often unsuccessful. The larger the organization, the harder it can be. Embracing change and becoming flexible often only occurs when no other option remains, or in short, extinction awaits.
In the normal flow of EMS selling, there is typically a lead follow-up phase that results in a face-to-face sales call. There may be an additional meeting to present a quotation, depending on the distance between the salesperson and decision-maker. There is also usually a plant tour. When all these activities are local, costs drop to the amount of time the individuals spend on the activity. However, the cost of a sales call that involves business travel may be $1,000 to $2,000, depending on mode of travel and how many sales calls are clustered into that trip.

All this keeps the electronics industry extremely busy. And the equipment we create – remote smart sensors, street-level broadband infrastructure, full-color digital signage, supercomputers on wheels (or wings) – is more and more likely to be required to operate faultlessly in extreme environmental conditions. Gone is the era when advanced electronics assemblies were mostly destined to spend their lives in air-conditioned telecom offices or otherwise benign environments. Now, they are out in the cold. And the heat. And the humidity. And this presents a major reliability challenge that needs to be addressed at every level from the installation and the enclosure down to the substrate.
A technical roadmap is basically a document that outlines what a company can and cannot do from a technical standpoint (e.g., minimum trace/space, layer count, pad and via size, overall circuit size, etc.). I have never been a fan of technical roadmaps. Virtually every flex (and rigid) PCB supplier is compelled by their customer base to provide their capabilities, and therefore also their limitations. The problem with roadmaps is twofold. First, every supplier advertises the absolute best it has ever done in every single category. This is true even if it only did it one time, on one circuit, and in a beaker. This is not a fair representation of what the fabricator can or cannot do on production quantities. The second problem is the real answer for what a supplier can or cannot do is “it depends.” Let’s look at a few examples.
Application notes describe how to save layers in a PCB by routing two traces between pins on a 1mm pitch BGA. A leading FPGA vendor recommends this practice to use its very-high-pin-count FPGAs in a low-layer-count PCB. When this approach is used for a high-layer-count PCB, the result is often, if not always, very poor yields, and the board is unreliable when used in a system under actual conditions, as opposed to in a laboratory or a prototype built in a small volume by a specialty shop. The following discussion will illustrate why this approach results in unsatisfactory yields when volume manufacture is attempted.
To understand the space used to route traces in signal layers of a multilayer PCB (this also applies to four-layer PCBs), it is useful to look at how plated through-holes (vias) are created and the various requirements that must be met by the finished PCB. FIGURE 1 is an illustrated cutaway of a plated through-hole showing signal and plane layers.




This month, I spoke with Rick Hartley about his presentation for the PCEA’s grand opening webinar on Jul. 14. Next, PCEA Chairman Steph Chavez shares a timely message on how our time working from home is a serious matter, and how letting our guard down could be a mistake.
Again, PCEA chapters are in transition, and due to social distancing requirements, no face-to-face meetings have taken place to date, but a lot of virtual activity is happening. I also share our most updated list of professional development opportunities and events, which we hope you find useful.
In this interview with Rick Hartley, we discuss the PCEA’s grand opening webinar on Jul. 14, where he presented a free class on PDN tips for successful power distribution. For access to the on-demand event, click here.
Like embedded resistors and capacitors, embedded magnetics provide a means for reducing system size and cost. Transformers and inductors used in power and telecommunication applications are often the more expensive devices in a system design. When realizing a power converter or RF module, cost and size reductions can be realized by combining the magnetics and PCB functions. This article provides an overview of embedded magnetics design and construction.
Inductors and transformers are basic building blocks of power and communication systems. A simple transformer or inductor can be implemented between two PCB layers. FIGURE 1 shows a cross-section of an embedded magnetic transformer. A cavity is milled into an FR-4 substrate. Ferrite cores are inserted and encapsulated in place with low-shrink epoxy. For those unfamiliar with ferrite material, it is a ceramic made by mixing iron oxide and metallic elements like manganese, nickel and zinc. The mixture is molded and fired to create a magnetic core. The materials are classified as ferromagnetic, meaning when a conductor is wrapped around the material and a current is applied, a magnetic flux will develop within the core and remain there as long as the current is applied. Permeability is a measure of the materials’ ability to build a magnetic flux. High permeability materials (5000 to 20,000) use a mixture of manganese and zinc (MnZn) and are generally used to produce RF inductors and transformers. Power applications also use MnZn, yet at a mixture that produces a much lower permeability, in the range of 1000 to 3000. RF and power applications also use inductors and transformers to filter noise. Nickel-zinc (NiZn) ferrites have lower permeability (800 to 2000), yet operate over a wider frequency band and are commonly used to filter noise. A system implementation may use a combination of ferrite cores. For instance, a power converter may use MnZn ferrites to temporarily store energy in a transformer or inductor, while also using inductors wound on NiZn cores to filter noise.
FIGURE 1 shows one corner of the BGA’s die and the attached wires. All the wires are intact here and on the rest of the BGA. All features are encased in the nearly transparent (to x-ray) mold compound. The black circular features are the solder balls under the BGA. The indistinct gray fea-ture just above the edge of the die is caused by the variable thickness of underfill material extruded from beneath the die. Within the area of this image there could be delaminations or voids – i.e., air-filled gaps – on top of the die or in the die attach material below the die, but air attenuates an x-ray beam so slightly, and the gaps are typically so thin, that these gaps would not be imaged.
A medical device manufacturer with an infrared thermometer had production shut down in its Tijuana-based EMS supplier as a result of Baja California-mandated Covid-19 restrictions. They needed to dual source as quickly as possible since this was a critically needed product.
Columns, rather than solder balls, are a critical subcomponent in the final assembly of FPGA packages.
A sudden shortage of mission-critical FPGA devices could result in warfighters not flying and rockets not launching. This is not an exaggeration. But how could this be? Quite simply, makers of ruggedized FPGA devices depend on a single subcontractor to provide services to attach copper-wrapped solder columns.
It wasn’t long ago the bottleneck on the production line was usually the placement machine, so the stencil printer was generally available and had plenty of time to run the print routine. With recent modular approaches to manufacturing line setups, however, this is no longer the case. Placement platforms have exponentially improved speed. The printer now must maintain a much faster pace; this starts with mechanics and cycle time. In mass production settings, getting a printer down to a core cycle time of five seconds has become a necessity.
Low-temperature soldering is a subject of considerable interest and development. Several forces are driving implementation of solders with lower peak reflow temperatures than SAC 305 and its variants. The most technically significant is reduced warping of component and substrates. Chip suppliers are particularly interested in lower reflow temperatures, as thinner components are needed to meet dimensional limitations of thinner, smaller and faster devices. When a component deforms during reflow, the solder interconnect may be compromised, resulting in non-wet opens (NWO). NWO defects are difficult to detect and may not manifest until after a product is in the field. Other advantages of low-temperature soldering include the incorporation of lower-cost plastics, component and laminate materials, and reduced energy consumption and related environmental benefits.
As a practical matter, SnBi alloys are the only elements available to reduce peak reflow temperatures. Unfortunately, high-bismuth alloys have a number of disadvantages compared with the tin/silver/copper alloys currently in use. Bismuth alloys exhibit poorer mechanical and thermal fatigue performance than SAC-based materials. Minor element additions and micro-alloy elements can improve the performance of SnBi alloys, but, in general, they will retain the properties of their main constituents and lack the reliability and performance of their SAC-based relatives. Even with these limitations, SnBi alloys can be adopted for use in SMT and through-hole, but the main benefits are derived in surface-mount assemblies.
Subtle component lifting can be an issue to find during inspection. Most modern AOI systems should be able to detect drawbridging on small passive and active parts. Old systems may struggle with defects like the two shown in Figure 1.
There are many papers on lifting of parts during reflow and many suggestions on the root causes. In our experience, the most common reasons are excess solder paste, an excessively thick stencil, or poor pad design. These issues are exaggerated by fast wetting, as seen in nitrogen and vapor phase soldering. To be clear, nitrogen or vapor phase do not cause lifting; they just increase the possibility of component lift.













“Vertical Interconnections by Electroless Au Deposition on Electroless Ni Immersion Au Surface Finish”
Authors: I. A. Weng, H. T. Hung, W. C. Huang, C. R. Kao and Y. H. Chen
Abstract: Electroless Au is used to vertically connect copper pillars with electroless Ni immersion Au surface finish on two stacked chips by a microfluidic electroless interconnection process. A low bonding temperature of 50°C and a pressure-less bonding process can be achieved. The vertical interconnections are formed by a forced flow of electroless Au plating solution through a microchannel, so the reduced Au atoms self-assemble between the gaps of facing copper pillars to complete the interconnections. The deposited Au grains span the entire gap across the two copper pillars, suggesting the rate-limiting step is more likely to be the nucleation than the growth of the Au grains. Four-point probe measurements show the average resistance of the electroless-Au-bonded interconnections is low. Mechanical shear testing reveals the bonding of the interconnections is strong. Further, it is demonstrated that this process can accommodate a high degree of pillar misalignment. (Journal of Electronic Materials, Jun. 5, 2020; link.springer.com/article/10.1007/s11664-020-08245-0)
