The Flexperts
How Does Combining Various Via Structures Affect Circuit Design?
In some cases, the designer might forego PTHs.
As components continue to shrink, designers are challenged to find strategies to route the supporting circuit to handle all the I/O from those components while using less real estate.

The high I/O count on these devices can cause major heartburn when trying to route out from under the BGA. There is not enough room for pad traces and spaces. And at pitches under 0.8mm, in some cases you cannot route signals between the pads.

This usually drives the designer to use a combination of blind or buried vias and microvias, along with through-holes. All these are fair game in flex and rigid-flex designs. The key is to implement them in a manner that permits the various structures to coexist.

The biggest concern on parts with multiple via structures relates to how to align the different vias with the various etched layers within the circuit. Different via structures are drilled at different times with different equipment and may use different fiducials for alignment. For example, while top layer laser microvias will use layer 2 as an alignment, full layer count mechanically drilled through-holes are aligned to an average of all the internal layers in the laminated board. What if these two datums are not perfectly aligned to each other? Here is a secret: While they are perfectly aligned in the CAD data, they are not in the real-life board.

The challenge, then, is that when it comes time to image and etch the outer layers, the manufacturer must make a choice on how to align the outer image. They can align either to the microvias or the through-holes, but not both. Typically, the manufacturer will align the image to the microvias because the hole-to-pad size relationship is tighter. The assumption is that the delta between the microvias and through-holes is not so much as to cause loss of annular ring on the through-holes.

Strategies to consider:
Provide extra allowance on plated through-hole pads. Allowing extra pad size on the through-holes will mitigate the via to through-hole misregistration impact.

Multiple lamination cycles may drive the need for additional annular ring allowance as well. Each extra lamination cycle may in turn require an extra 0.002″ of pad diameter to account for potential misregistration. The through-hole may need larger pads than a buried via in the same board.

Another consideration is the minimum hole size the supplier will drill if via fill is required. This is usually limited by aspect ratio, as well as their confidence in getting the fill material to flow through and fill a small via. Imagine when drilling at 0.008″ with copper plating, the finished hole diameter may be 0.005″ or smaller, depending on plating thickness. Some suppliers may say this is too small to get the via fill epoxy to flow through the hole. This may drive them to a larger drill size (say 0.010″) and may result in the need to increase pad size accordingly. Thicker boards (e.g., >0.093″) may also cause the manufacturer to drill larger in order to fill a deep hole.

Use no plated through-holes. In designs where there are no leaded components or connectors, there is no need for plated through-holes from the top to bottom layer. Eliminating through-holes reduces concern of misalignment. These designs use buried vias, with microvias added to provide connection from top to bottom. There are no through-holes. The advantage here is alignment concerns are reduced. Designers use this strategy on “true” HDI designs.

Reconsider annular ring requirements. If a combination of different via structures is needed, including through-holes, that is fine. Ask what type of annular ring is really needed to meet reliability needs.

Do the buried vias need anything more than Class 2 (90° breakout)? There is nothing soldered in or on these holes. Class 2 annular ring may allow reduced pad size and increased routing room.

For through-holes that are just vias, ask the same thing. You may allow Class 2 annular ring on these holes, while maintaining Class 3 on holes for components like connectors.

One caution as you do this: Ensure sufficient clearance from the drilled hole wall to any adjacent copper feature. A trace too close to the drilled hole wall can create a path for a high-resistance short.

Via-in-pad strategies. At 0.8mm pitch and below, via-in-pad is likely necessary. There are still decisions to make, however. A combination of microvias and through vias can be used for via-in-pad. However, the through vias will have larger pads, which might not fit on smaller devices. Another option is to use only microvias for via-in-pad. This has the potential to eliminate via fill and cap plating on any of the through-hole vias. This can save money. It can also influence the minimum spacing the manufacturer can achieve due to the reduction of total plating on the external layers. Keep in mind that once you decide to use microvias on a layer, the number used is not really a cost driver.

There are ways to navigate these perplexing BGA waters. Account for the manufacturing realities of your strategy choices, and confidently route your way to a successful design.

Nick Koop headshot
Nick Koop
is senior field applications engineer at TTM Technologies (, vice chairman of the IPC Flexible Circuits Committee and co-chair of the IPC-6013 Qualification and Performance Specification for Flexible Printed Boards Subcommittee; He and co-“Flexpert” MARK FINSTAD ( welcome your suggestions.