
Best of all, you can rest easy with our upfront, transparent, and hassle-free purchasing process.

Best of all, you can rest easy with our upfront, transparent, and hassle-free purchasing process.




ON PCB CHAT (pcbchat.com)
PRINTED CIRCUIT DESIGN & FAB/CIRCUITS ASSEMBLY, PO Box 470, Canton, GA 30169



ON PCB CHAT (pcbchat.com)
PRINTED CIRCUIT DESIGN & FAB/CIRCUITS ASSEMBLY, PO Box 470, Canton, GA 30169
Mike Buetow, 617-327-4702, mbuetow@upmediagroup.com
SENIOR Editor
Chelsey Drysdale, 949-295-3109, cdrysdale@upmediagroup.com
design technical Editor
Pete Waddell
editorial office
P.O. Box 470, Canton, GA 30169,
888-248-7020
PCD&F CONTRIBUTING EDITORS
Akber Roy, Peter Bigelow, John Burkhert, Mark Finstad, Bryan Germann, Bill Hargin, Nick Koop, Greg Papandrew
Circuits Assembly CONTRIBUTING EDITORS AND ADVISORS
Clive Ashmore, David Bernard, Robert Boguski, John D. Borneman, Joseph Fama, Susan Mucha, Chrys Shea, Jan Vardaman, Ranko Vujosevic
Art Director and production
blueprint4MARKETING, Inc., production@upmediagroup.com
Frances Stewart, 678-817-1286,
fstewart@upmediagroup.com
SENIOR SALES ASSOCIATE
Brooke Anglin, 404-316-9018,
banglin@upmediagroup.com
EXHIBIT sales
Frances Stewart, 678-817-1286,
fstewart@upmediagroup.com
PRINT/electronic Reprints
cdrysdale@upmediagroup.com
president
Pete Waddell
vice president, sales and marketing
Frances Stewart
vice president, editorial and production
Mike Buetow
director of group shows
Alyson Corey, acorey@upmediagroup.com
Printed Circuit Design & Fab/Circuits Assembly is distributed without charge to qualified subscribers. For others, annual Subscription Rates in U.S. funds are: $80 (U.S. and Canada), $145 (all other countries). Single copy price is $8.50. All subscription and single copy orders or inquiries should be directed to Printed Circuit Design & Fab/Circuits Assembly , PO Box 470 Canton, GA 30169, email subscriptions@upmediagroup.com. Photocopies and issues on Microfilm/Microfiche (16mm, 33mm or 105mm) are available from University Microfilms International, 300 N. Zeeb Rd., Ann Arbor, MI 48106, Telephone 313-761-4600.
Printed Circuit Design & Fab/Circuits Assembly is published monthly by UP Media Group Inc., PO Box 470 Canton, GA 30169. ISSN 1939-5442. GST 124513185/ Agreement #1419617.
Periodicals postage paid at Canton/Ball Ground, GA, and additional mailing offices. © 2020, UP Media Group, Inc. All rights reserved.
Reproduction of material appearing in Printed Circuit Design & Fab/Circuits Assembly is forbidden without written permission.
Postmaster: Send address changes to
Printed Circuit Design & Fab/Circuits Assembly, PO Box 470 Canton, GA 30169.


buetow
in-chief
e’ve spoken at length in these pages about the virtual factory. But what about the virtual factory tour?
By this, I don’t mean the flashy, MTV-style videos found on so many company websites today. Instead, a live plant tour, executed using cameras and PCs.
I have been studying manufacturers to determine whether, in the wake of the coronavirus surge, they are noticing changes in the way customers decide where to put production, and whether that’s a permanent change or a temporary fix. According to my unscientific sample, the answers are “yes” and “we’re not sure.”
Count Teresa Huber, president and chief executive of Intervala, among those seeing changes. The EMS company, which has sites in Pennsylvania and New Hampshire, is substituting video conferencing for onsite meetings and in-person audits.
“We are seeing more video conferencing, and we have processes in place to share documentation on processes, give quality yield data from internal production, interface electronically,” she told me. “We are definitely seeing a trend in that being the way things get done. People are getting more comfortable with the idea they may not be able to physically touch where their product is going to be made. We can reassure them through a combination of data, online conferencing, and a lot of customer references.”
Karl Dietz, a PCB materials expert who spent more than 40 years at DuPont Electronics Materials, passed on May 5.
Galaxy Circuits named Carl Schlemmer director.
Google awarded a $43,000 grant to a professor of electrical engineering at Missouri University of Science and Technology who is using machine learning to bridge the gap between PCB design theory and the requirements of more complex electronics.
Innovative Circuits promoted Chris La Croix to plant manager.
TE Connectivity named Martin Bayes fellow – corporate technology.

The group applied for the SpaceX Hyperloop competition, the Elon Musk brainchild that challenges teams of college students to design and build high-speed pods. The Canadian team didn’t win, but its second-place finish was good enough for Cadigan and Day to land jobs at another Musk startup, Neurolink.
There, the two engineers leveraged knowledge gained from the Hyperloop experience, for which they designed control boards and worked on data acquisition. Meanwhile, Noseworthy wrapped up an internship at Wind River, which led to a position there as a firmware developer. At the same time, Warren was in Silicon Valley working as an engineer at Apple.
“We are very happy to join forces with BBG,” said Martin Magnusson, president of NCAB Group USA. “NCAB Group USA and BBG together will take on a leading position in the US PCB market. This brings additional value to our North American segment, with increased ability to offer our customers superior quality and service, as well as more volumes to our existing factories. BBG’s supply chain management and factories are mainly located in Taiwan, which is a great supplement to our existing factory base and allows for more options in order to satisfy our customers’ PCB demands in the future. We have the same value-driven organization and the same focus on giving our customers excellent quality and service.” (CD)
“We are investing to broaden our capabilities and reach with the addition of the ATS team, who share our values of providing exceptional customer service and outstanding quality,” said Stephen P. DeFalco, chairman and CEO, Creation Technologies.
The acquisition expands Creation’s capabilities in the aerospace and defense, medical, and tech industrial markets. It adds locations in Everett, WA, and Hermosillo, Mexico, each offering three automated SMT lines, as well as automated through-hole, ICT, flying probe, and functional test capabilities. (CD)
Zoom, Zoom, ZOOM! I am not tech savvy or social media conscious, so it should be no surprise that three months ago I had never heard of Zoom. I know about it now! I spend a good portion of each day, including weekends, on a Zoom “call.” At first it was family trying to connect from the various places they were hunkered down. But then I began receiving requests from customers and suppliers to schedule a Zoom meeting to discuss one or another thing. Zoom enables those working remotely to participate with the few still working out of their office or factory. Zoom is user-friendly, and unlike WebEx, easier for those working at home to manage.
What I find intriguing about the use of Zoom is how those working at home can put up a background picture or just talk with a blank screen to avoid those on the Zoom from seeing their cluttered kitchen or den. It certainly reduces potential embarrassment for some who work from home. But imagine, anyone can get a picture of a world-class manufacturing plant – or process line – or shelves of “inventory” for display so viewers think that is their plant. Oh, the potential here is limitless!
From an electronics manufacturing services (EMS) provider perspective, what does that mean? First, consider what Covid-19 has done to this business sector. Many EMS providers remained operational at some level thanks to product mixes that included essential products that support infrastructure or medical needs. However, even those companies typically are working at reduced levels and have experienced employee angst about virus risk. Customers with nonessential product are in some cases cutting forecasts dramatically and in other cases will have a lot of pent-up demand. Those trends depend on whether the product is something buyers have simply been waiting out the quarantine to purchase or will likely not purchase for months after the quarantine ends. When you overlay today’s trends on a post-Covid-19 world, it translates to manufacturing constraints, supply-chain constraints, plus pockets of oversupply. If a large part of the US gets back to work by May 1, it is likely that pent-up demand will continue to be a factor. If the quarantines in place in mid-April extend through May in a large part of the country, it is hard to predict what the demand landscape will look like. Datacom, industrial and medical products will likely remain strong, but consumer demand will drop dramatically.
The answer may depend on how you react.
Vendor acquisitions can cause supply-chain disruptions, especially when the acquiring firm has a competing product line. Few PCB buyers seem to understand the real economics involved, or why they happened in the first place and what it means to them as customers.
Acquisitions usually fall into two categories: Either the acquiring firm buys the present customer base and its revenue stream, or it acquires some leading-edge or dissimilar technology of the acquired supplier – like a rigid supplier acquiring a flex manufacturer, for example. Either way, the goal of the acquiring firm is to catapult its sales efforts.
The humble via comes in many flavors. By connecting one layer of a conductor pattern to another, vias have connected the world. My career has depended on them as part of the hardware I used to design for others to use. A foundational innovation in electronics brought plated through-holes to the masses. As a leap forward from wire-wrap technology, multilayer printed circuit boards put a “mainframe” in each of our pockets almost overnight.
From the first plated through-hole to the latest, the trend is to support higher-density interconnect. The key driver in plating holes is the aspect ratio, the hole’s width relative to its depth. For a through-hole, the depth is the thickness of the PCB. Most reputable fabricators can handle a 10:1 ratio, such that a common 0.062″ board thickness will require a minimum finished hole size 0.006″ (FIGURE 1).
Finished hole size is just what it says on the tin. The initial drill will be one- or two-thousandths of an inch larger than the finished size to account for the thickness in the copper “barrel.” The barrel is created by drilling through-holes and electroplating the top and bottom of the board prior to etching away the circuit pattern. There are two complete sheets of copper of a starting thickness. As those are plated up, the prepared holes get their plating. That is all the copper that is added to form the barrel. Other protective layers come later.
As PCB industry veterans, we know well the board is typically the last part of the project specified when a new product is designed. On the other hand, it’s the first item needed when serious development begins. Designing the circuitry to go on the PCB obviously gets most of the attention, but the substrate itself is usually the lowest priority in engineers’ minds. When the time finally comes to consider it, teams will often simply default to the same materials used previously. As performance demands imposed on successive product generations continue to intensify, and factors such as conductive anodic filament (CAF) formation that seriously affect reliability become more critical, this approach is increasingly unsatisfactory.
When faced with this, don’t worry. Rigid-flex allows us to design in almost any configuration. Each has performance and cost tradeoffs. Let’s review few of the more common design styles.
Although PCEA chapter activities have been limited because of restrictions due to Covid-19, PCEA Chairman Steph Chavez offers his perspective on the challenges of staying connected without using traditional means. Last, I share our most updated list of professional development and event opportunities, although some may be affected by the Covid-19 outbreak. Stay tuned for more updates.
As we physically isolate ourselves to prevent the spread of Covid-19, our work cannot stop. Many still have day jobs to tend to; you might be working from home, or you might be required to mask-up and join coworkers on the front lines of an essential business. Our industry’s needs and domestic responsibilities have not changed, but how we process them has. Adaptation is a key to those of us working at the PCEA to build a new organization. Now, more than ever, we are relying on the internet and online meetings to evolve our ideas and act on them.
Many designers and some EDA design tools place heavy emphasis on current density when sizing traces for a given current. Current density is current/unit area. Thus, it does make some intuitive sense that trace temperature might be proportional to current density: the higher the current, the higher the current density, and therefore the higher the temperature. But it is much more complicated. Following this design rule blindly may lead to significant design errors, especially when designing vias for allowable current. And a few examples will illustrate why.
Simple case. FIGURE 1 illustrates two microstrip traces on a board. Trace B is thinner and wider than Trace A, but they both have the same cross-sectional area. And, they both carry the same current. Therefore, they have the same current density. But they do not have the same temperature.
The thinner, wider Trace B will have a significantly lower temperature than Trace A. The reason is the most important cooling factor is thermal conduction away from the trace through the dielectric. Trace B, with the greater surface area in contact with the dielectric, will cool more efficiently and will therefore have the lower temperature.
Each year PCD&F surveys the PCB design community concerning issues surrounding their profession. For years, the feedback has had one connecting thread: Many PCB designers are experts with decades of experience. Their retirement has loomed large and has been widely anticipated, accompanied with concerns – and a little trepidation – about who will replace them. In conference classes and site visits in recent years, companies have discussed how they are working with educators at universities and local colleges to inform engineering students about industry opportunities. Recent survey results hint their efforts may be starting to pay off. And the time for boomer retirements is here.
PCD&F conducted its annual design engineers’ salary survey in early 2020, receiving 254 qualified responses from bare board designers, managers and design engineers. Data compiled included job titles and functions, ages, years of experience, education, location, types of projects, annual salaries and sales, job satisfaction and challenges, ECAD tools used, and years left in the field, among other data. While year-over-year changes are shown, they are for comparison only, and should not be assumed to be definitive.
New high-end computing system technologies becoming available for such applications as servers, telecom and the cloud must meet bandwidth, power, thermal and environmental challenges. Advanced packaging technologies that can drive integration and increase functionality, at acceptable cost and risk levels, will be key enablers for the sector.
Advanced silicon integration technologies, such as through-silicon vias (TSVs), are enabling 2.5D silicon interposers and 3D chip-stacking, providing high-density interconnect, and therefore, high bandwidth capability between components. Memory modules have started to use this already, and they will continue to expand. More compute elements are also starting to use TSV and novel packaging technologies to enable heterogenous integration by combining compute “chiplets” with I/O memory chiplets integrated either via 2.5D substrate level or 3D stacking.
by LENORA CLARK, PAUL SALERNO and SENTHIL KANAGAVEL
The Society of Automotive Engineers (SAE) and US Department of Transportation classify levels of vehicle autonomy from 0 to 5. Level 0 incorporates no automation; levels 1-3 have varying degrees of partial assistance to the driver, where the automobile, for example, can control steering, acceleration and deceleration, and even interfere with the driver. Finally, in full autonomy, level 5, the car drives on its own and makes all decisions and reactions to its surroundings.1
The automotive market uses a combination of sensors to make these critical decisions. Radar designs are the fastest growing sensors in ADAS today, due to the longer-range capabilities and their resistance to all weather conditions.2 This research will focus on radar designs, specifically long-range 77GHz radar, to showcase how automotive materials are changing and, through the choice of alternatives to those conventionally used in the space, how product life and reliability can be enhanced.
Just when we think we have reached the limit on shrinking substrate thicknesses, tighter pad spaces and higher component densities, the industry says, “Not so fast!” Today’s mobile phone boards average a remarkable 0.6mm thickness, with as many as 1,000 components packed into a 20mm x 80mm space. Over the past five years, advanced equipment sets have accelerated transport, tooling, vision systems, inspection capabilities and platform controls, all of which have certainly made producing high-quality products with ultra-small dimensions possible. However, in the stencil printing world, even more may be required to ensure maximum board stability during the print operation.
Traditionally, the mode of transport – bringing the PCB or pallet into the machine – has been achieved on some form of rubberized belt. This will no doubt continue as the solution for the assembly line. Inside the printer, however, not only is the board brought into the machine on the belt, but the substrate is clamped to the belt to hold it stationary, present it to the stencil and print. This has worked very well for years and is fine for multiple product builds. For mobile phones and other handheld products, however, current and future dimensions dictate a new paradigm. What are 600µm-thick phone PCBs today likely will continue to get thinner and, even at their current architectures, are susceptible to any type of undulation or extra pressure. Clamping thin, small boards or pallets to a rubber belt can result in movement, twisting or bowing at the substrate edges and potential print accuracy issues. There are flat belt options, which have been the interim solution for thin board printing, but the belts are still constructed from rubber and not completely rigid. Finally, belts are subject to wear; they eventually lose elasticity and require replacement. Without proper maintenance, even greater instability can occur.
Warpage can prevent pick-and-place machines from accurately placing components. Warpage can cause the lead-free wave solder machine to pick up solder and flood the board with solder. Even worse, a warped printed circuit may not fit in the case or cause problems with automated handling equipment (buffers, etc.).
A few items cause warpage, all known and preventable. The primary reason why a PCB will warp is uneven or imbalanced copper percentages in different layers. When a design is presented to a PCB manufacturer, the fabricator will run a check of the percentage of copper on each layer. This is to ensure the design is balanced; i.e., the copper plane percentages are even about the center. Consider, for instance, a typical 8-layer PCB. A copper power plane would be on layers 4 and 5 and signal layers on the remaining layers. The innerlayer 4-5 has an almost full copper percentage on both sides. The remaining layers are low-copper-percentage signal layers. The stresses locked in by lamination will even out or equilibrate
THIS MONTH WE illustrate solder balling and incomplete reflow when reflowing through-hole components with pin-in-paste.
Solder balling pin-in-hole reflow (PIHR) close to the body of the connector suggests poor design of the stencil for this application (Figure 1). There is no standoff on the corner of this part, which may have permitted the paste to be displaced when the component was attached. There should always be free space around the paste deposit to permit placement and reflow, without contacting the paste.
INCREASED USE OF x-ray inspection throughout the component and PCBA supply chain to check the quality of optically hidden joints and features can elevate a component’s level of radiation dose during assembly. A simple and sensible question, therefore, is can this cause any issues? For example, could this increase the risk of component failure, either a complete, temporary or intermittent failure, that happens during manufacture or potentially at some later time in the field? A sensible and simple question perhaps, but, unfortunately in my experience, one that generates many further questions and uncertain answers.
In general, the industry consensus, together with the reality that x-ray inspection has been widely used for years, is that for most components there is probably not an issue with the radiation doses likely during x-ray inspection. But here we enter our rabbit hole of additional questions: What constitutes the “not most” components?













Authors: Ryan Hensleigh, et al.
Abstract: 3-D printing can create complex geometries that could be of use in the development of electronics. However, the approach is mainly limited to nonfunctional structural materials, and the 3-D printing of electronic devices typically requires multiple process stages of embedding, spraying and writing. Here, the authors report a 3-D printing approach that can volumetrically deposit multiple functional materials within arbitrary 3-D layouts to create electronic devices in a single step. The approach prints 3-D structures with a programmable mosaic of distinct surface charge regions, creating a platform to deposit functional materials into complex architectures based on localized electrostatic attraction. The technique permits selective volumetric depositions of single metals and diverse active material combinations, including ceramic, semiconducting, magnetic and colloidal materials, into site-specific 3-D topologies. To illustrate the capabilities of the approach, the authors used it to fabricate devices with 3-D electronic interfaces that can be used for tactile sensing, internal wave mapping and shape self-sensing. (Nature Electronics, Apr. 6, 2020; nature.com/articles/s41928-020-0391-2)
