Printed Circuit Design & Fab Circuits Assembly November 2020 Cover
November 2020
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November 2020 • VOL. 37 • NO. 11
Printed Circuit Design and Fab Circuits Assembly logo
First Person
No debate of the importance of technology.
Mike Buetow
money matters
Covid can’t stop the talent crunch.
Peter Bigelow
Tech Talk
Supporting the “roots” of the manufacturing tree.
Jan Vardaman
Implementing HDI in design.
John Burkhert
The fourth industrial revolution.
Alun Morgan
The cost-reduction conundrum.
Jerry Johnson
LTS under x-ray.
Dr. David Bernard
Beat your spam.
Robert Boguski
PCB delamination root causes.
Bob Willis
November 2020 • VOL. 37 • NO. 11
Printed Circuit Design and Fab Circuits Assembly logo
Signal Integrity
Consider these alternatives for advanced PCB design and analysis.
by Zachariah Peterson
Up Media November 2020 cover
PCB Layout
PCB layout will eventually be fully automated. So why can’t edge rates be automatically part of PCB design libraries?
by Charles Pfeil
Counterfeit Components
A trillion-dollar industry remains exposed to knockoff parts that are sometimes electrically superior to the real thing. Why are counterfeits still so prevalent in the electronics supply chain? And what can be done about it?
by Mike Buetow
Low-power, low-leakage devices will become the norm in new designs.
by the iNEMI Portable & Wireless Emulator Group
Assessing the impact of six solder mask options on under-component cleanliness.
by Jigar Patel and Umut Tosun
IN the Digital Edition
The latest happenings of the Printed Circuit Engineering Association.
Updates in silicon and electronics technology.
by Binghamton University


Conformal Coating Protection
with Dr. Sean Clancy
Electronic Data Transfer Advancements
with the IPC-2581 Consortium
POSTMASTER: Send address changes to
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Caveat Lector
Mike Buetow headshot
Resolved: A New Policy for Tech Planning is Needed

ore than 160 years ago, eons before Facebook and Twitter were conceived, a pair of candidates to represent Illinois in the US Senate engaged in a series of debates. As they barnstormed their way around the state, incumbent Democrat Stephen Douglas and his Republican challenger Abraham Lincoln faced off in the heat and rain in front of thousands of citizens.

Known today as The Great Debates of 1858, the respective candidates used the time to frame their positions on the leading issues of the day.

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Around the World
PCDF People
Aismalibar named Steven Calvert field applications engineer.
Frank Giuliani
Bowman appointed Frank Giuliani quality assurance engineer. He has a bachelor’s in electrical engineering and was previously a support engineer for Bruker and Oxford Instruments.
Kevin Coates
Fluidity Technologies named Keven Coates senior electrical engineer. He previously was a development engineer for seven years at Geospace Technologies and also spent 18 years at TI.
Peter Kruk
NCAB Group named Peter Kruk CEO, replacing Hans Ståhl, who retired. He was previously president of the EMEA region at Dometic Group, and president of Stoneridge Electronics.
Ari-Pekka Tenko
NCAB Group Finland named Ari-Pekka Tenko managing director. He comes to NCAB after 10 years at Ascom, where he was country manager and head of sales.
Around the World
PCB East Returns at Customers’ Request
ATLANTA, GA – In response to customer demand, PCB East returns to Boston for 2021 for the first time since 2009. The three-day technical conference takes place May 10-12, 2021, in Marlborough, MA. The event includes a one-day exhibition on May 11.

“PCB East is a much-needed opportunity for the design community to get together and check out the latest technology,” said Mike Buetow, editor in chief, Printed Circuit Design & Fab/Circuits Assembly and conference director, PCB East. “The show is expected to include a range of suppliers from the ECAD, PCB design service, fabrication and assembly supply chain. As Covid-19 has slowed national travel, locally-focused events like PCB East have become vital networking and selling opportunities.”

Around the World
IPC Releases Medical Apps Addendum to Specification for Rigid PCBs
BANNOCKBURN, IL – IPC in October released IPC-6012EM, Medical Applications Addendum to IPC-6012E, Qualification and Performance Specification for Rigid Printed Boards.

The IPC D-33AM Task Group developing IPC-6012EM realized there are two different focuses for electronics in the medical device industry sector: the high-volume production of standard-sized PCBs for medical diagnostic equipment applications and the miniature high-density PCBs for small devices, often human body implantable.

“We understand the medical industry utilizes electronics in laser surgical devices, radiation emitting devices, x-ray machines, ultrasound devices and implantables where product failure can result in the high risk of injury to the patient,” said John Perry, IPC director of printed board standards and technology. “IPC recognized the industry’s desire for more stringent printed board fabrication requirements than can be provided within the current IPC Class 3 Performance class for these types of medical devices. The IPC D-33AM Task Group was created to develop an addendum to the base IPC-6012E printed board performance specification that addresses those technological needs.”

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Around the World
CA People
Rob DiMatteo Headshot

BTU promoted Rob DiMatteo to director of sales – Americas. He has more than 28 years of extensive experience in surface mount assembly, customer support and product development.

Chidinma Imediegwu, a graduate student at the Georgia Institute of Technology, has been selected as the winner of the 2020 Charles Hutchins Educational Grant.
Neways Electronics announced COO Adrie van Bragt will leave the company at year-end by mutual agreement.
Raytheon promoted Ted Shpak to senior director of quality and mission assurance.
Lenora Clark headshot

SMTA cited Lenora Clark with its 2020 Member of Technical Distinction Award.

SMTA awarded Sabrina M. Rosa-Ortiz the 2020 Joann Stromberg Student Leadership Scholarship.
Around the World
Z-zero, Mentor Collaborate on Stackup Data Exchange
REDMOND, WA – Z-Zero has teamed with Mentor to add bidirectional data exchange capabilities to its printed circuit board stackup software. The development is said to bridge the gap between designers and fabricators for the exchange of material-based stackups.

Stackup data captured in Z-Zero’s software are moved from OEM to the fabrication, assembly and test phases and back again based on Siemens’ ODB++Design open data structure.

The goal, Z-Zero said in a press release, is to provide the accurate PCB material parameters crucial during the design, signal-integrity simulation, and new product introduction (NPI) process.

Around the World
Dixon to Open 3d Handset Assembly Plant

NOIDA, INDIA – Dixon Technologies is opening a third cellphone assembly plant in January, its 11th manufacturing facility overall.

The EMS company will invest RS 750 million (US$10.3 million) on the new plant, according to reports.

“We will be starting operations in January in our third handset factory, which will increase our total capacity from 30 million units per month to 80 million units per month in the first year,” said Sunil Vachani, chairman, Dixon.

The new plant will create more than 4,000 jobs, including 900 in the first year. (CD)

Around the World
Lacroix Expands in Poland, France
KWIDZYN, POLAND – Lacroix Electronics is adding 16,000 sq. m. to its factory here, according to reports. The existing plant is 14,000 sq. m. The firm says the extra space will be used for research and development and production.

The current building focuses on the automotive market, while the extension will be dedicated to industrial and home automation.

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Around the World
CA Briefs

Apple, Google and others are shifting production to prepare for a “decoupled” global market in response to the US campaign to cut China from the tech supply chain.

Apple has sued Canadian electronics recycling company Geep after it was caught illegally selling over 100,000 Apple devices that were supposed to be recycled.

AMD reportedly is in advanced talks to acquire rival chipmaker Xilinx.

Checksum joined with Integration Alliance to distribute its in-circuit testers in Southwestern Ontario and other parts of Canada.

Circuitwise Electronics Manufacturing has won a new contract with Siemens.

Cisco named Flex recipient of the Cisco 2020 Excellence in Sustainability Award.

Around the World
CEP Technologies Expands Cleaning, Tape-and-Reel in TX

SAN ANTONIO – CEP Technologies is expanding its technical cleaning and tape-and-reel operations at its manufacturing facility here to support the EMI/RFI shielding market in the US and Mexico.

“Devices and circuit boards are becoming smaller and faster, with strict electromagnetic compatibility requirements,” said CEP president Ken Kaufmann Jr. “And there is a continuing need for better interference control. If manufacturers hope to bring new devices and finished products to market, custom shielding will be a big part of that. Metal shields offer a trusted and durable solution. Given how many electronic and communications devices are packed into nearly every product made these days, shields can’t merely be designed well; they need to be manufactured with care to minimize the risk of EMI and RFI on devices.”

CEP produces custom shielding components that suppress and prevent internally generated signals and external ambient temperatures from interfering with equipment operations. Its two-piece covers and frames protect PCB components. (CD)

Market Watch
Military Rebound

Trends in the U.S. electronics equipment market (shipments only).

Computers and electronics products
Storage devices
Other peripheral equipment
Nondefense communications equipment
Defense communications equipment
A/V equipment
Nondefense search and navigation equipment
Defense search and navigation equipment
Medical, measurement and control
rRevised. *Preliminary. 1Includes semiconductors. Seasonally adjusted. Source: U.S. Department of Commerce Census Bureau, Oct. 2, 2020
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Talent Search
The pandemic created a unique environment for finding talented employees.
LOOKING BACK ABOUT a year ago, the challenge that kept you awake at night was people. More precisely, where and how to find people to hire – people with talent, a work ethic and interest in a long-term career manufacturing electronics. 2020, of course, has brought a slew of new concerns, and made us adaptable to what is described as the “new normal.” But surprise! Right up there with how many face masks, hand sanitizer and Plexiglas partitions are available in the stockroom, staffing remains the major concern for business leaders.

The focus on people certainly has taken some twists and turns through this year. During the first six months, many were focused on how to retain the workforce they had. To be sure, potential health issues, social distancing, work-from-home protocols and other necessary obstacles displaced new talent acquisition, and jolting headlines on unemployment claims, especially in the hospitality and retail sectors, forced business leaders to consider when the next shoe would drop and the order board would dry up. Thankfully – or maybe luckily – most manufacturing, and especially electronics manufacturing, has remained surprisingly “normal,” and customers, employees and suppliers have recalibrated as necessary.

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R&D: The Roots of the Manufacturing Tree
Can we build on past successes of cost and task sharing?
Much attention is focused on the importance of boosting electronics manufacturing in the US, but in a recent interview, Emmanuel Sabonnadiere, CEO of CEA-Leti, called R&D the roots of the tree of manufacturing. What a great analogy. Without successful R&D in the electronics industry, successful manufacturing is not possible. Creating the best ecosystem to foster R&D is key.

Recent analysis from IC Insights describes the semiconductor business as defined by rapid technological changes, and high levels of investment are needed in new materials, innovative manufacturing processes for increasingly complex chip designs, and new advanced packaging and assembly methods. Yet the industry has seen a slowdown in R&D spending since the 1980s (FIGURE 1).

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designer’s notebook
High Density Interconnect Printed Circuit Boards: How to HDI
Why a 3-N-3 stackup is the sweet spot.
The leading cause of HDI requirements comes from the chip vendors. The original ball grid array packages supported regular vias. Little by little, the pins got cozier. The 1.27mm pitch became 1mm, then 0.8 down to 0.65mm center-to-center. This was the final node where plated through-hole (PTH) vias was an option.

The next step down is 0.5mm class BGAs. We can still use a through-via embedded in the solder pad, but there are two issues. One, the via must be filled and capped to produce a flat surface that doesn’t permit solder to drain away during reflow (FIGURE 1). The other is that the typical “8/18” via has a finished hole size of 0.2mm and a capture pad of 0.45mm. On a 0.5mm pitch device, that leaves 50µm for a trace and an airgap on either side of the trace. That’s not practical.

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Local Chapters: Making Sense(s) Out of Virtual Meetings
Why online get-togethers don’t have to “stink.”
This month I share a few thoughts on the formation of our chapters and commentary from of a few of the PCEA staff regarding their thoughts on where the chapters are and where we need to go. Next, PCEA chairman Steph Chavez shares some encouraging words for these extended times of Covid. So our readers will not miss a beat, I include our list of professional development opportunities and events and close with a preview of what is in store for the column next month.
PCEA Updates
Like you, I need to find ways to engage in normal activities without the comfort of normal surroundings. I mean, the surroundings are normal – I’ve been working at home – but my activities are not normal. In fact, they are highly abnormal for a social person like me who, if tested, would surely red-line the extroverted, sensing and feeling indicators of the Myers-Briggs type indicators.
Material Gains
How Previous Industrial Revolutions Can Help Us Approach This One
Embrace Industry 4.0 for cleaner, healthier lives.
Industrial electronics is a stealthy but enormously valuable business. Approaching one-quarter of all PCBs manufactured worldwide are for industrial applications, including not only equipment for use in factories but activities such as construction and power generation. In Europe, about 40% of electronic production is destined for industrial applications.

Though cost-conscious, industrial companies appreciate the importance of investing in advanced technology to secure their market position and take advantage of new opportunities. While investing is critical for survival, early adopters can gain a significant competitive edge. This is increasingly the case as the fourth industrial revolution – Industry 4.0 – continues to transform activities.

You Don’t Always Need S-PARAMETERS
Consider these alternatives for advanced PCB design and analysis.
These days, I try to keep up with interesting signal integrity discussions on forums, SI listservs, and LinkedIn. After reading a recent question about PDN models and parasitic extraction on SI-lists, I made the comment (paraphrased) that “S-parameters are overgeneralized.” Someone might rightly ask for clarification, and PCD&F seems the right forum to address this.

The point of the comment is this: S-parameters are not always the most conceptually satisfying mathematical tool – nor the only tool – for analyzing in every situation. Other designers might disagree with this and that’s fine; if you can garner important design insights from S-parameters, rather than some other parameter set, then so be it. My goal isn’t to knock S-parameters, but alternatives have more useful mathematical properties, or a more satisfying conceptual meaning, in certain situations.

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It’s About Time: Let’s Automate High-Speed Constraints
IC vendors should make edge rates easily available for inclusion in PCB design libraries. by CHARLES PFEIL
PCB layout will eventually be fully automated. Although the effectiveness of automated place-and-route algorithms has declined over the years as designs became more complex, all the ECAD companies have been successfully automating other areas of the design process.

Now the age of artificial intelligence (AI) for ECAD has arrived. Jitx, DeepPCB, Luminovo and Celus already have design-related products using AI. Zuken, Mentor, Altium and Cadence have ongoing development projects applying AI methods. Many obstacles must be overcome. Yet an aspect of PCB layout is ripe for automation today, even without AI.

There is an opportunity for high-speed constraints to be automated. My book High-Speed Constraint Values1 provides all the equations and methods ECAD companies can use to accomplish this goal, without AI. A significant obstacle is preventing automation of high-speed constraints, however.

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Attack of the Clones
A trillion-dollar industry remains exposed to knockoff parts that are sometimes electrically superior to the real thing. by MIKE BUETOW
Thousands of words have been written on the preponderance of fake parts. Scores of solutions have been presented, from x-raying suspect devices to using boundary scan software to applying DNA taggants to authentic components at OCM factories, not to mention that old destructive standby cross-sectioning.

Organizations such as SAE have written standards governing inspection and test procedures, workmanship criteria, and even training and certification requirements on the art of counterfeit device detection.1 The US government has codified use of detention and prevention measures in its annual defense budget.

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Advanced Packages and New 5G Technologies Will Drive Portable Products
SLPs with lines and spaces <35µm are ahead. by URMI RAY
Ed.: This is the ninth of an occasional series by the authors of the 2019 iNEMI Roadmap. This information is excerpted from the roadmap, available from iNEMI (
The iNEMI Roadmap defines portable and wireless devices as “high-volume consumer products for which cost is the primary driver, including handheld battery-powered products driven by size and weight reduction.”

A significant portion of this sector continues to be dedicated to the relatively mature but still evolving and growing smartphone/phablet/tablet. Although the market segment is mature, the content and functionality of premium tier smartphones are increasing exponentially with the adoption of artificial intelligence (AI) and machine learning (ML). A major emerging growth area in this sector is personal activity monitors, or wearable electronics, which are becoming widely adopted, especially among the more urban and suburban areas of the US and other advanced nations.

Assessing the impact of six solder mask options on under-component cleanliness. by JIGAR PATEL and UMUT TOSUN
Why consider solder mask selection as a factor that can affect cleaning process effectiveness? The solder mask impacts the component standoff height. Of the three options – solder-mask defined (SMD), non-solder-mask defined (NSMD), or no solder mask (NoSM) – NoSM can increase the standoff height, which may enhance the cleaning process. Standoff height will vary depending on board design and component selection, so it is difficult to quantify standoff height for each solder mask selection and specific component. Reference TABLE 1 for average standoff heights for specific component groups.1
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State-of-the-Art Technology Flashes
Updates in silicon and electronics technology. by GARY MILLER
Ed.: This is a special feature courtesy of Binghamton University.
Smallest on-chip optical modulator has switching speed up to 11Gb/s. University of Rochester researchers have created the world’s smallest modulator for photonic integrated circuits, augmenting communications, computing, and photonics research. The device consists of a thin film of lithium niobate (LN) bonded on a silicon dioxide layer to create a modulator that, besides being small, operates at high speed and is energy-efficient. The modulator occupies an electro-optical modal volume of 0.58µm3 and has a modulation bandwidth of 17.5GHz, switching speeds of up to 11Gb/s and a tuning efficiency of up to 1.98GHz/V. Applications include communications, computing, and quantum photonic information processing. (IEEC file #11886, Laser Focus World, 8/27/20)
Product Development and the 7 Wastes
Striking the right balance between costs and cycle time.

Decisions made in product design can impact assembly cost, defect opportunities and inventory cost. While design for manufacturability (DfM) analysis can eliminate many issues, less commonly analyzed decisions related to cost targets, scheduling and work team assignments can have unintended consequences that generate unacceptable levels of waste.

Lean manufacturing practitioners are aware of Taiichi Ohno’s concept of the seven wastes (muda) in manufacturing as part of the Toyota Production System (TPS). To recap, those seven wastes are:

  1. Waste of overproducing (no immediate need for product being produced).
  2. Waste of waiting (idle time between operations).
  3. Waste of transport (product moving more than necessary).
  4. Waste of processing (doing more than what is necessary).
  5. Waste of inventory (excess above what was required).
  6. Waste of motion (any motion not necessary outside of production).
  7. Waste of defects (producing defects requiring rework).
test and inspection
X-ray Inspection of Low-Temperature Solder Joints
Results of experiments on PTH parts.
Use of low-temperature solders (LTS) is growing in popularity. LTS are predominantly composed of tin and bismuth, with a small quantity of a “special blend” of other elements to suit a given manufacturer’s performance specifications. The opportunity, as the name suggests, is to create solder joints at far lower temperatures than those required for tin/silver/copper (SAC) alloys, and which are even lower than that needed for the (historic?) tin/lead eutectic solder. These LTS have a melting temperature of ~138°C. The benefits of using LTS mean no Pb is present in the joint, and lower processing temperatures can be used. Using lower temperatures means reduced energy consumption during manufacture, lower manufacturing costs and reduced greenhouse emissions. In addition, it offers the opportunity to use different, thinner and possibly cheaper PCB substrates and components compared with those used today. This obviates the “overengineering” required of today’s boards and components to mitigate warpage, which due to LTS are operating close to the glass transition temperature of the board material. It also makes it possible to rework SAC area array package joints with low-temperature alloys.
SEEING IS believing
Unsolicited Advice for the Morning Spammers
Sales pitches from Chinese board shops should come with arthritis medication.
Dramatis PersonaE (in order of appearance):

  1. Saleswomen from Chinese printed circuit board fabricators, all with curiously westernized first names.
  2. Marketing types trying to sell me lists of attendees at nonexistent trade shows.
  3. Serial killers.
  4. Clowns (sometimes indistinguishable from #3). Generally speaking, disturbing.
  5. SBA-approved loans. (I have one qualified offer right now from I’m not making this up.)
  6. Webinars about I-9 forms and Covid-19 mitigation and prevention.
  7. Virtual trade shows (and the people lurking behind them).
  8. SAM renewal.
  9. Persons wanting me to sell our business.
  10. Search engine optimization (SEO) companies, which often lead to:
  11. Website developers from India named Mike.
defect of the month
PCB Delamination Root Causes
Moisture is only one of the potential culprits.
PCB delamination can be subtle or obvious. It is caused by expansion of moisture in the PCB laminate, but that may not be the root cause. Eliminating moisture often prevents the energy buildup that forces apart different layers, but this is not the complete story. Poor bonding during manufacturing of the multilayer board or some form of contamination may result in poor adhesion on innerlayers, permitting moisture to accumulate on these surfaces.

FIGURE 1 shows solder mask cracking around a through via. The PCB expanded during reflow, then contracted during cooling. This resulted in lifting and cracking of the solder mask, plus an intermittent electrical connection. FIGURE 2 shows the innerlayer surface of the board after separation. The through vias are separated and there is no visible adhesion on this layer.

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Technical Abstracts
In Case You Missed It
Harsh Environments
“Radiation-Hardened and Repairable Integrated Circuits Based on Carbon Nanotube Transistors with Ion Gel Gates”

Authors: Maguang Zhu, Hongshan Xiao, et al.

Abstract: Electronics devices that operate in outer space and nuclear reactors require radiation-hardened transistors. However, high-energy radiation can damage the channel, gate oxide and substrate of a field-effect transistor (FET), and redesigning all vulnerable parts to make them more resistant to total ionizing dose irradiation has proved challenging. Here, the authors report a radiation-hardened FET that uses semiconducting carbon nanotubes as the channel material, an ion gel as the gate, and polyimide as the substrate. The FETs exhibit a radiation tolerance of up to 15 Mrad at a dose rate of 66.7 rad s−1, which is notably higher than the tolerance of silicon-based transistors (1 Mrad). The devices can also be used to make complementary metal-oxide-semiconductor (CMOS)-like inverters with similarly high tolerances. Further, the authors show that radiation-damaged FETs can be recovered by annealing at a moderate temperature of 100°C for 10 min. (Nature Electronics, Aug. 24, 2020,

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