designer’s notebook
John
Burkhert, Jr.

HDI Design Strategies

HDI techniques use strategic component placement, microvias and via-in-pad technology to create compact, reliable, high-performance circuit boards.

Printed circuit board design sometimes involves the editing of previous circuits. Other times, the board is an empty polygon waiting for you to populate it with virtual symbols. Next, connect them with the graphical version of traces and shapes. All of this effort creates a digital twin of the product. PCB designers have figured out that connecting the dots is a small part of the day-to-day saga of product development.

The PCB designer’s task is to create that above-mentioned twin based on a number of competing factors, including:

  • Meeting DfX requirements within IPC specifications for the class
  • Capturing design intent as rule-driven constraints for validation
  • Reserving the space required for FCC immunity
  • Thermal performance/battery life
  • Ever-decreasing form factors
  • Progressively shorter timelines
Figure 1. Step one of the placement study is to confirm that all parts are in the library. The components that are already placed were largely predetermined by the outline drawing. It gives confidence that we can place the board, but there will be parts on both sides. The outline drawing requires double-sided component placement to begin with. That gives us a lot more real estate. The critical check will be how much headroom we have on the far side. Keep-out areas are often reserved for cables and other features. (All images credit: Author)

The pressure is on from day one. To gamify the process, there are elements of chess, jigsaw puzzles, Tetris, connect-the-dots, SimCity, and even Grand Theft Auto, where designers have to take space from one thing to provide for something else. Different interests can have you feeling a bit like King Solomon, wondering how to divide up the finite space on the board during the even more finite schedule.

Size Matters: The Smaller, the Better

Some things we can control, and others we can only hope to influence. Asking for more room halfway through hits differently than when you make the case right away. New boards feature new connectors and other items that need to bubble up through the library to the layout.

“Clean that up before making copies all over…”

If that’s your job, build them as well as you can to help with things like organizing silkscreen. The “Wizard” will build errors into the library footprint. One is creating zero-width silkscreen over pads. Clean that up before making copies all over the board. If routing under a certain kind of part is a problem, solve it at the component level with a route keep-out. A little extra work on the library pays

Figure 2. This is a classic example of the connections driving the placement. Matching networks, switches and diplexers are among the ancillary components that find their way into an analog block. Placement details favor trace flow more than the assembly house’s preference for consistent component orientation. The shortest trace is the best trace.

For placement, it makes sense to start with parts like connectors, where the location is already determined. If ESD suppression diodes are involved, it’s a no-brainer to place them close to the connector pins. Not everything is that simple to discern, but the schematic can offer clues. Setting up automatic cross-probing is pretty easy.

Once you do that, every part you click in the layout tool shows up on the schematic. After you’ve used cross-probing that way, it’s going to be in play for all of your placement and power delivery decisions. I feel like I have a hand tied behind my back without it. Sometimes, an engineer will leave local notes on the schematic with instructions. That’s another reason to look for context when placing components.

The chip maker wants you to adhere to the diagram or assume the risk.

Of course, another nice-to-have is a quick link to the data sheet for the various chips. App notes will provide placement diagrams for optimal performance. The chip maker wants you to follow the diagram or assume the risk if the device fails.

Figure 3. HDI PCBs support the microelectronics common in today’s computers and other electronic devices. The thickness of the bare board is 1mm, saving some space in the z-axis. We like thin computers with lots of batteries. This holds true for almost everything.

Do it their way, or you’re on your own. In reality, you have more parts than the diagram shows, and the data sheet may include hole-tolerance callouts beyond the fabricator’s capacity. For layout-dependent devices, placement will be negotiated as those little parts get shuffled around to fit the limited space.

If there is no existing work to copy, I like to create an ideal layout for a device outside the board outline before putting it on the board. The little parts often reveal the full context of the routing.

Other than that, placement is about walking down the schematic page, picking symbols and having that part’s footprint appear under my cursor in the layout tool. Again, using cross-probing to place components or using the highlight command to colorize a page’s worth of components keeps things in focus. That will be handy if you’ve already run a quick place to see what you’re working with page by page.

With the biggest chip in the middle and the connectors on the edge, all that’s left are the smaller groups clustered around the board outline in their rainbow of highlight colors. Of course, the memory is going right next to the processor chip. Some choices are obvious, but there’s also a grey area where it would be nice to keep it close to the device. Count on having more ancillary devices than “storefront” around the primary devices.

Figure 4. A cluster of 0201(imperial) caps and resistors plus a few test points support a processor on the opposite side of the board. Silkscreen was omitted from many of the components as there wasn’t sufficient room.

The bottom of the board is often the best side for applying bypass caps. They’re small and numerous. When a chip is 10mm or more across, the bottom side could get much closer to the inner grid where power and ground pins are fairly common. The inductive loop will be measurably shorter. This is especially good for capacitors measured in picofarads, like 22 or 47pF, for example.

Big bulk caps can use the top side and do their thing at a distance. There’s lumped capacitance, and then there are distributed elements. We have those and usually some ferrite beads to split up the power domains. It’s common to start with lots of filters and capacitors, then try to depopulate certain ones to see if they are really needed. We can’t remove anything from the board until we fill it up.

Figure 5. The component placement spacing will be influenced by the routing topology. Around the horn, we have a plated through-hole via followed by staggered microvias with a buried via, then over to the diff-pairs using stacked microvias with buried vias, and finally a full stack of microvias. This fan-out study also proves the copper pour rules that give extra space to the differential pairs.

The advantages of HDI PCBs:

  • No additional space is required for fan-out by using via-in-pad technology. Minimum component spacing is generally sufficient all around.
  • The smaller microvias are lower in impedance, and that helps with signal integrity.
  • Back-drilling is unnecessary as the via can go from one layer to any other layer with the exception of buried vias.
  • HDI boards may be the only option with many of the leading-edge devices on the market. Fine-pitch parts are usually the first package out of the gate for new silicon.

Creating HDI boards requires more than a traditional single-lamination cycle. Each sequential layer pair takes as long to laminate as a complete through-hole board. The press is both expensive to buy and is the bottleneck in the typical fab shop. The result is higher labor costs and longer lead times for high-definition interconnect circuit boards. As they say, you pay to play.End of article content

John Burkhert, Jr. is a principle PCB designer in retirement. For the past several years, he has been sharing what he has learned for the sake of helping fresh and ambitious PCB designers. The knowledge is passed along through stories and lessons learned from three decades of design, including the most basic one-layer board up to the high-reliability rigid-flex HDI designs for aerospace and military applications. John’s well-earned free time is spent on a bike, or with a mic doing a karaoke jam.