Understanding Flex Circuit Cost Drivers
Part geometry, material selection, layer count, via strategy and final finish are among the key design decisions that determine flex circuit costs.
Every designer is tasked with creating a design that meets all performance criteria. A flex circuit must interconnect a variety of components and inputs and outputs within the envelope of the finished product. It must achieve size, weight and power goals while also meeting cost targets. When trying to balance all that, it is good to know where the cost drivers are. The early design tradeoffs will define at least 80% of the final cost.
So, let’s talk about some of the main cost drivers. While this won’t answer all the possibilities, it should provide a feel for some of the bigger considerations.
Part size and shape is one of the biggest drivers. Plain and simple, the more parts the manufacturer can get on a panel, the lower the cost. In North America, the most common manufacturing panel size is 18×24”. Usable area for parts is about 16×22”, give or take. This accounts for tooling and coupons. So, selecting a part size that fits well on the panel with high utilization is key. Sometimes flex circuits have arms or appendages that stick out one side or the other of the main body. This may impact the panel layout. An appendage may be able to extend from more than one place and still meet design requirements. One of these geometries is likely to positively impact panel utilization. The part outline should be reviewed to determine how efficiently it fits on a panel.
Material choices matter. For flex laminates, the cost rises as the polyimide film gets thicker. In fact, the costing is more sensitive to the polyimide thickness than it is to the copper weight. The same goes for coverlay and bondply. For coverlay, 0.001” polyimide film is the lowest cost. Anything thicker or thinner increases cost. For rigid laminates and prepreg, the same rule of thumb applies to rigid-flex as it does to rigid PCBs. Higher-performance materials cost more. However, they may be an enabling choice when it comes to things like impedance and high speed and frequency.
Layer count is a cost driver too. Obviously, more layers equal more material and more processing, which adds to cost. It usually leads to a thicker PCB, driving up the drilled-hole aspect ratio of depth to diameter. Also, as layer count goes up, the challenge of aligning all the layers to each other and meeting annular ring requirements increases.
There can be reasons to add layers to manage costs. For example, in some cases, adding a layer or two may allow for larger pads, wider traces and wider spaces. This can improve yields, especially if feature sizes go from advanced or leading edge back to something more middle of the road. An extra layer or two may also allow for simplification of the outer layers. Since these are plated layers, moving them one layer inside leaves them unplated and easier to etch.
It should also be noted that, in general, going up from an odd number of layers to an even number, such as nine layers to 10, can be a minimal cost adder. This is because most laminates are procured as double-sided clad. If a stack has an odd number of layers, it is likely that one of the cores will have one side etched off completely. This means paying for the copper and then paying to have it etched away. Conversely, increasing from an even number of layers, say 10 to 11, is a bigger cost jump because it adds more material to the stackup.
The via strategy is a key cost driver. Combinations of through vias, blind vias, buried vias and microvias definitely impact cost. Each via type requires a separate process to form the hole and a separate set of processes to plate it. In addition, various via structures will drive sequential lamination processes.
Some hole types will require nonconductive via filling. Buried vias are filled to avoid embedding an air pocket inside the PCB. Blind vias are filled to protect the via and board from subsequent processing. Some through vias need via fill as well if the via is located in a surface-mount pad. These vias in pad need to be copper cap plated to create a planar SMT pad. This is called via-in-pad plated over (VIPPO). Via filling and planarizing tend to be expensive processes and, in some cases, lead to yield loss.
Microvias are often copper plated full for one of two reasons. Internal microvias are copper filled to allow for the next level of microvia to be plated on top of them. Exterior microvias are filled because they are usually in an SMT pad.
Combining various via types and terminating them on the same layer will result in multiple plating operations on that layer, which will make etching that layer more difficult. It also makes imaging that layer more difficult because the different via types have different alignment origins. It can be difficult to align the image and meet annular ring requirements for all via types. Extra pad diameter may be needed to mitigate the risk.
While some of these via structures can add to cost, they are essential in most HDI products. In fact, avoiding some mixture of microvias and buried vias in favor of through vias only can result in a design that is actually too difficult to build. The resulting yield may be so low that a buried via and microvia combination can be the lower-cost option.
Final finish can drive costs in several ways. Some finish types, such as gold, can be more expensive given the fluctuating cost of gold. Thicker coatings will also drive up cost.
Electrolytic finishes like nickel and gold require electrical connections. This means either using the finish as the etch mask or having tie bars that may or may not need to be removed after plating and etching. These will impact yield and add extra steps. This has been a major reason designers have shifted to ENIG and ENEPIG finishes.
Requiring more than one finish adds costs for both finishes. There are also a number of operations to mask and unmask for each finish that drive up costs. Consideration must be given to where finishes may overlap or need to be segregated.
Certainly, some designs require one or more of these cost drivers to meet end-product performance requirements. The key is to consider tradeoffs to maximize performance while simultaneously staying within cost boundaries. When in doubt, a trusted supplier can provide guidance on choices that optimize the design and manage costs.End of article content
Nick Koop is director of flex technology at TTM Technologies (ttm.com), vice chairman of the IPC Flexible Circuits Committee and co-chair of the IPC-6013 Qualification and Performance Specification for Flexible Printed Boards Subcommittee; nick.koop@ttmtech.com. He and co-“Flexpert” Mark Finstad (mark.finstad@flexiblecircuit.com) welcome your suggestions.