Quilter AI Tool Lays Out Complete Computer Design in Less than Week, Company Says

LOS ANGELES – Quilter in December announced the creation of a printed circuit board design for a computer using artificial intelligence tools in under a week.

The startup company, founded in 2019 by former SpaceX engineer Sergiy Nesterenko, said a single engineer completed the layout taking a schematic to manufacturing-ready files in less than a week, a process that traditionally takes an entire engineering team months and requires multiple rounds of redesign. This initiative, called Project Speedrun, represents a major milestone for the hardware industry, demonstrating an ability to compress quarter-long hardware R&D cycles into rapid weekly experiments.

Project Speedrun based its computer design around the widely used NXP i.MX 8M Mini processor, the same embedded computing hardware commonly used in automotive infotainment, safety and machine-vision systems. The system was fully functional upon first boot, capable of handling the demands of video calls, video games and more – a rare outcome in printed circuit board design, where projects typically build in as many as 3-5 respins when scoping.

Guangzhou Guanghe Technology Files for Hong Kong IPO

HONG KONG, CHINA – Guangzhou Guanghe Technology has submitted its prospectus to the Hong Kong Stock Exchange, seeking a main-board listing with CITIC Securities and HSBC acting as joint sponsors.

According to its prospectus and third-party data from Frost & Sullivan, Guanghe ranked third globally and first among China-headquartered manufacturers by cumulative revenue from computing server PCBs between 2022 and 2024. Server-related products now account for more than 70% of total revenue, reflecting strong demand tied to AI workloads, data center expansion and high-performance computing.

The company operates major manufacturing bases in Guangdong and Hubei provinces and supplies both OEM customers and electronics manufacturing services providers through a direct sales model.

US-China Economic & Security Review Commission Highlights Need for American-Made PCBs

WASHINGTON – The US-China Economic and Security Review Commission has released its 2025 Report to Congress, warning that decades of offshoring PCB manufacturing have sharply eroded domestic capacity. According to the report, US PCB production in output value has fallen from roughly 30% of global supply in 2000 to just 4% today.

The Commission emphasized that semiconductors used in national defense, critical infrastructure and commercial systems all rely on PCBs as their foundational platform. It flagged US dependence on foreign suppliers, particularly China, which now accounts for approximately 60% of global PCB production, as a strategic vulnerability.

While current US defense needs are still supported by domestic manufacturers, the report noted that defense demand alone is insufficient to sustain a modern PCB industrial base. As a result, the United States lacks the capacity to scale production rapidly in response to national or economic security needs.

Looming Substrate and Materials Shortages for Advanced Packaging, TechSearch Warns

AUSTIN, TX – Rapid growth in AI servers and data center hardware will push substrate demand beyond available capacity by 2028, forcing manufacturers to expand production within the next three years, according to a recent report from TechSearch International.

Advanced Packaging Update highlights rising pressure on substrate materials – especially glass fiber used in core constructions – and evaluates potential alternatives as supply tightens.

The analysis also compares projected high-bandwidth memory (HBM) demand against planned capacity, noting widening gaps as AI accelerators scale. A dedicated section examines hybrid bonding adoption, equipment requirements, and competing fine-pitch interconnect approaches now entering development.

Foxconn to Invest $170M to Build Electronics Manufacturing Plant in Louisville

LOUSIVILLE, KY – Foxconn in December confirmed plans to establish a US production hub in Louisville, announcing a $170 million investment that will bring 180 new jobs to the region. The project is being supported by Kentucky Economic Development Finance Authority incentives for the company.

The company expects production to begin in the third quarter of next year.

Incap Buys Lacon in $54M Deal, Expands Defense and Design Services

HELSINKI – Incap has signed an agreement to acquire 100% of Germany’s Lacon Group in a transaction valued at $54.2 million, marking an expansion of the Finnish EMS provider’s presence in Europe and growing its position in fast-growing defense and industrial markets.

Lacon Group operates EMS and ODM facilities in Germany and Romania totaling roughly 21,300m². Its offering includes PCB assembly, cable harnessing, box build, system integration and design and testing services, which are capabilities that expand Incap’s scope beyond manufacturing and into full product-development support. For the first 10 months of 2025, Lacon reported unaudited revenue of $61.8 million.

The purchase price will be paid in cash and funded through Incap’s own reserves and a bank loan of about $32.5 million. An additional earn-out of up to $5.4 million may be paid in 2027 based on Lacon’s 2026 financial performance. Closing is expected in the first quarter of 2026 pending foreign-investment approvals in Germany and Romania.

Micro-Precision Technologies Acquires Stellar Manufacturing

SALEM, NH – Micro-Precision Technologies has acquired Stellar Manufacturing, adding PCB assembly capabilities to its US microelectronics platform. The deal, which closed in early October, builds on MPT’s partnership with Great River Capital Partners and supports its expansion across defense, aerospace, medical and commercial markets.

Stellar’s Salem, NH, operation will continue serving customers. MPT said the acquisition combines Stellar’s PCBA expertise with its own hybrid, multichip module and thick-film technologies.

Advanced Packaging Market Set to Double by 2034

OTTAWA – The advanced packaging market is poised for explosive growth over the next five years, driven by AI, high-performance computing and the insatiable demand for smaller, faster electronics, a new report asserts.

According to new research from Towards Packaging, the global advanced packaging sector will climb to $78.8 billion by 2034 from $40.3 billion in 2025 – a compound annual growth rate of 7.6%. (more)

Ultra HDI: What is It and How is It Different than HDI?

With ultra-high-density interconnect design, small features come with big decisions.
by Anaya Vardya

Ultra HDI (UHDI) has become a prominent part of the PCB design conversation, often presented as “the next frontier” in density and miniaturization. But before we move on to advanced routing strategies and design techniques, let’s establish a solid practical foundation. What is the difference between UHDI and the HDI processes, which so many designers have already learned to rely on? Why does the shift in the underlying process matter, and when does it become worth incorporating into mainstream design work? We will address those questions here.

What Ultra HDI Actually Means

Most designers are well-acquainted with traditional HDI: laser-drilled microvias, 3–4 mil line/space and the lamination cycles required to build stacked or staggered microvia structures. For many years, this combination carried us comfortably through 0.8mm and 0.65mm pitch devices, meeting the rising expectations of high-speed digital architectures.

The Critical Nature of PCB Stackup, and How to Build an Efficient One

Like a building foundation, the stackup supports every layer above it.
by Akber Roy

The way the printed circuit board layers shown in Figure 1 are arranged is called a stackup. It’s one of the most important constructs in a PCB design. In many ways, it’s configured just like the foundation of a building. If the stackup is weak or poorly planned, for example, everything built on it will suffer from instability, no matter how good the circuit design is.

Why the PCB Stackup Matters

As noted, proper circuit design can be undone by a poorly planned stackup. Here are some ways to think of how the board is constructed and the effects of a thoughtful approach.

The Marketplace for Untapped Inventory

Where excess inventory stops being clutter and starts being currency.
by Ryann Howard

For years, companies have treated excess electronic components like an embarrassing secret. They get over-purchased, boxed up and quietly written off – destined for the trash, the gray market or whatever corner of the warehouse no one wants to inventory.

And according to startup founder Margaret Upshur, the bill for that silence is massive.

“We’re talking about $15 billion of chips across the whole industry getting thrown away annually,” she says. “That is the size of many very robust, full industries, just the amount that’s being thrown away.”

A Comparison of Stencil Capabilities

How do modern stencil materials and coatings influence transfer efficiency and volume repeatability as SMT features continue to shrink?
by Chrys Shea, Antonio Torres and Michael Butler

The key indicators of SMT stencil performance are transfer efficiency and volume repeatability. Transfer efficiency (TE) refers to the percentage of solder paste released from the stencil when compared to the stencil’s aperture volumes and is expressed as a percentage. Typical values range from 60% to 120%.

While maximizing TE is important, minimizing variation is imperative. Variation in solder paste prints leads to rework, a non-value-added expense that risks the assembly’s functionality and reliability. Volume repeatability is expressed in terms of statistical variation. The coefficient of variation (CV or CoV) is calculated by dividing the standard deviation of print volumes by their average. It is also expressed as a percentage. Acceptable values are 10% or less. Borderline values are 10-15%. CVs over 15% are unacceptable.

Background

The relationship between stencil design and print quality is often characterized using the following terms:

• Area ratio (AR) is calculated as the area of the aperture’s PCB-side opening divided by the area of the aperture walls (Figure 1). It is an indicator of the relative adhesive forces on the solder paste deposit during separation from the stencil. As area ratios decrease, the typical percentage of paste transferred also decreases. The minimum acceptable area ratio is often considered to be 0.60 for typical SMT purposes that print with Type 4 solder paste and 0.66 when using the larger particles in Type 3 solder paste.

In Case You Missed It

Additive Manufacturing

“Additively Printed Circuit Performance of Thermoformed In-Mold Electronics for Automotive Applications”

Authors: Pradeep Lall, Aditya Harsha, Shriram Kulkarni and Scott Miller

Abstract: The design and production of electronic components, especially in the automobile sector, could be completely transformed by in-mold electronics (IME), a revolutionary technology. IME provides benefits including better weight reduction, improved aesthetics and increased space efficiency by facilitating the smooth integration of electronic circuits into intricate three-dimensional surfaces. Nevertheless, despite their increasing use, thorough research on the electrical properties of IME circuits is still lacking, especially for those made with screen-printing methods on polycarbonate (PC) substrates that are then thermoformed. It is still unclear how important manufacturing factors, such as substrate deformation, ink conductivity, and mechanical stress, affect circuit performance. The purpose of this study is to look into how the electrical performance of IME circuits made for automotive applications is affected by screen-printing and thermoforming settings. This study offers important insights into the viability and dependability of IME technology in actual automotive settings by examining resistance fluctuations, capacitance stability, and overall circuit performance both before and after thermoforming. The results facilitate IME’s wider implementation in next-generation vehicle electronics by advancing understanding of its design and optimization. (Journal of Electronic Packaging, Nov. 29, 2025, https://doi.org/10.1115/1.4070511)